Comprehensive Study on Gate Driver for SiC-MOSFETs with Gate Boost

High temperature pulsed-gate robustness testing of SiC power MOSFETs

Strained-Si single-gate versus unstrained-Si double-gate MOSFETs

Self-consistent full-band Monte Carlo simulations are employed to compare the performance of nanoscale strained-Si single-gate (SG) and unstrained-Si double-gate (DG) MOSFETs for a gate length of 25 nm. Almost the same on-current as in the DG-MOSFET can be achieved by strain in a SG-MOSFET for the same gate overdrive. This is due to the compensation of the higher electron sheet density in the t...

Comparison of Single-Gate SOI & Multi-Gate SOI MOSFETs

This article presents the comparison of SingleGate SOI and Multi-Gate SOI MOSFETs. In the first part we have presented two main fundamental problems of the “ultimate” (sub-10-nm) MOSFET scaling of Single-Gate geometry: the exponential growth of power consumption and sensitivity to fabrication uncertainties. These factors have played the decisive role in for eventual transfer of the CMOS industr...

Compact Model for Multiple-Gate SOI MOSFETs

In this work we present compact modelling schemes, for the undoped nanoscale multiple-gate MOSFET, suitable for design and projection of these devices. The proposed models have a physical basis and assume well-tempered multiple-gate MOSFETs; i.e., transistors with small shortchannel effects. We have considered different transport models (drift-diffusion and quasi-ballistic models); each one is ...

Modeling of Gate Tunneling Current for Nanoscale MOSFETs with High2k Gate Stacks

A quantum model based on solutions t o t he SchrÊdinger2Poisson equations is develop ed t o investigate t he device behavior related t o gate tunneling cur rent f or nanoscale MOS F ETs wit h high2 k gate stacks . This model can model various MOS device st ructures wit h combinations of high2 k dielect ric materials and multilayer gate stacks , revealing quantum effects on t he device perf orma...